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19-3469; Rev 0; 11/04
KIT ATION EVALU E AILABL AV
Single-Chip Global Positioning System Receiver Front-End
General Description Features
Complete Single-Chip GPS Front-End Receiver Single-Ended or Differential Outputs at 1.023MHz Low 4.5dB Typical Noise Figure No External IF SAW or Discrete Filters Required Very Low 32mW Power Consumption at +2.4V Wide +2.4V to +3.6V Operational Supply Voltage Range Extended -40C to +85C Temperature Range
MAX2742
The MAX2742 complete single-chip global positioning system (GPS) RF front-end utilizes many innovative and leading-edge RF CMOS design techniques. This highperformance, state-of-the-art device consumes extremely low power and eliminates the need for costly SAW and bulky discrete IF filters. The MAX2742 incorporates a fully integrated low-noise amplifier (LNA) and mixer, IF section, digital sampler, and local oscillator synthesizer. The intended input signal for the MAX2742 is the L1 GPS signal 1.57542GHz. This device supports highaccuracy output quantization, which delivers the best performance obtainable for the GPS receiver. The power consumption of the MAX2742 is as low as 32mW at a +2.4V supply. The MAX2742 is available in a space-saving 48-pin TQFP package and is specified for the extended (-40C to +85C) temperature range.
Applications
In-Vehicle Navigation Systems (IVNS) Location-Based Services (PDAs and Accessories) Recreational Handheld/Walkie Talkies Geographical Information Systems (GISs) Telematics (Vehicle, Asset Tracking, and Inventory Management) Emergency Roadside Assistance
XTALIN2 XTALIN1
Ordering Information
PART MAX2742ECM TEMP RANGE -40C to +85C PIN-PACKAGE 48 TQFP-EP*
*EP = Exposed paddle.
Block Diagram/ Pin Configuration
CPOUT VTUNE SHDN 37 36 I.C. BIAS CP CONTROL BLOCK 35 I.C. 34 I.C. PFD DIV GND GND RFIN GND GND 5 6 7 8 9 VGA AGC COMP LNA 33 I.C. 32 VDD 31 DIN 30 GND 29 CLKOUT2 28 DOUT 27 I.C. 26 CLKOUT1 25 VDD 13 GND 14 DCLK 15 CLKENB2 16 CLKENB1 17 VDD 18 AGCFLT 19 OUT20 OUT+ 21 I.C. 22 I.C. 23 VDD 24 GND GND GND GND 38 VDD VDD VDD 39 I.C. 40
Emergency Response Systems Digital Cameras/Camcorders Consumer Electronics
RBIAS CBIAS VDD VDD 1 2 3 4
48
47
46
45
44
43
42
41
TCXO BUFFER
MAX2742
IFSEL 10 I.C. 11 VDD 12
________________________________________________________________ Maxim Integrated Products
1
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Single-Chip Global Positioning System Receiver Front-End MAX2742
ABSOLUTE MAXIMUM RATINGS
VDD to GND ...........................................................-0.3V to +3.7V All Other Pins to GND.................................-0.3V to (VDD + 0.3V) RF LNA Input Power .......................................................+10dBm Continuous Power Dissipation (TA = +70C) 48-Pin TQFP-EP (derate 12.5mW/C above +70C) ....100mW
CAUTION! ESD SENSITIVE DEVICE Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Soldering Temperature (10s) ...........................................+300C
DC ELECTRICAL CHARACTERISTICS
(MAX2742 EV kit, VDD = +2.4V to +3.6V, SHDN = VDD, TA = -40C to +85C. Typical values are at VDD = +3V and TA = +25C, unless otherwise noted.)
PARAMETER Supply Voltage Supply Current Logic-Input High Voltage Logic-Input Low Voltage Logic-Input Bias Current -40 Shutdown mode VDD - 0.5 0.5 +40 CONDITIONS VDD = +3.0V, TA = +25C (Note 1) MIN 2.4 TYP 14 10 MAX 3.6 20 UNITS V mA A V V A
AC ELECTRICAL CHARACTERISTICS
(MAX2742 EV kit, VDD = +2.4V to +3.6V, SHDN = VDD, TA = -40C to +85C. Typical values are at VDD = +3V and TA = +25C, unless otherwise noted.)
PARAMETER GENERAL PERFORMANCE Maximum Conversion Gain Input Frequency Noise Figure Return Loss (S11) LNA/Mixer Input IP3 Output IF Frequency OUTPUT STAGE Output Rise/Fall Time Output-Voltage-Level Low Output-Voltage-Level High Differential (VOUT+, VOUT-), CL < 20pF Single ended (DOUT), CL < 20pF Differential Single ended Differential Single ended 25 5 VDD - 0.9 0 VDD ns V V f1 = 1.5MHz and f2 = 2.0MHz above carrier frequency Measured at quantizer input (Notes 2, 3) 102 1575.42 4.5 -15 -32 1.023 117 dB MHz dB dB dBm MHz CONDITIONS MIN TYP MAX UNITS
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Single-Chip Global Positioning System Receiver Front-End
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2742 EV kit, VDD = +2.4V to +3.6V, SHDN = VDD, TA = -40C to +85C. Typical values are at VDD = +3V and TA = +25C, unless otherwise noted.)
PARAMETER SYNTHESIZER TCXO Input Frequency Charge-Pump Current Phase Noise Comparison Frequency Spur VCO Turning Range VCO Tuning Gain IF STAGE IF Stage Gain Dynamic Range IF Stage Gain Bandpass Filter 1dB Corner Frequency Bandpass Filter 60dB High-Side Rejection Image Rejection In-Band Ripple AGC Loop Lock Time Low-frequency corner High-frequency corner VGA set at maximum gain 77 50 0.1 3.2 5.0 18 1 1 dB dB MHz MHz dB dB ms fOFFSET = 10kHz offset, BWLOOP = 70kHz fOFFSET = 1MHz offset, BWLOOP = 70kHz BWLOOP = 70kHz (Notes 2, 3) (Notes 2, 3) 148 139 Fundamental frequency crystal 18.414 0.4 -71 -106 -66 210 200 277 305 MHz mA dBc/Hz dBc MHz MHz/V CONDITIONS MIN TYP MAX UNITS
MAX2742
Note 1: At TA = +25C, min/max limits are guaranteed by production test. Note 2: At TA = -40C, min/max limits are guaranteed by design and characterization. Note 3: At TA = +25C and +85C, min/max limits are guaranteed by production test.
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Single-Chip Global Positioning System Receiver Front-End MAX2742
Typical Operating Characteristics
(MAX2742 EV kit, VDD = +3V, and TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
MAX2742 toc01
LNA/MIXER GAIN vs. TEMPERATURE
29 28 LNA-MIXER GAIN (dB) 27 26 25 24 23 22 21 VCC = +3.0V VCC = +2.7V
MAX2742 toc02
16 15 SUPPLY CURRENT (mA) VCC = +3.0V 14 13 12 11 10 -40 -20 0 20 40 60 VCC = +2.7V VCC = +2.4V
30 VCC = +2.4V
20 80 -40 -20 0 20 40 60 80 TEMPERATURE (C) TEMPERATURE (C)
MAXIMUM IF STAGE GAIN vs. TEMPERATURE
MAX2742 toc03
TOTAL CONVERSION GAIN vs. TEMPERATURE
MAX2742 toc04
80
105
79 VCC = +3.0V VGA GAIN (dB) 78 VCC = +2.7V
104 SYSTEM GAIN (dB) VCC = +3.0V 103
77
102 VCC = +2.7V
76 75 -40 -20 0 20
VCC = +2.4V
101 VCC = +2.4V 100
40
60
80
-40
-20
TEMPERATURE (C)
0 20 40 TEMPERATURE (C)
60
80
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Single-Chip Global Positioning System Receiver Front-End
Pin Description
PIN 1 2 3, 4, 12, 17, 23, 25, 32, 39, 44, 46 5, 6, 8, 9, 13, 24, 30, 38, 42, 45 7 10 11, 21, 22, 27, 33-36, 40 14 15 16 18 19, 20 26 28 29 31 37 41 43 47, 48 EP NAME RBIAS CBIAS VDD GND RFIN IFSEL I.C. DCLK CLKENB2 CLKENB1 AGCFLT OUT-, OUT+ CLKOUT1 DOUT CLKOUT2 DIN SHDN VTUNE CPOUT XTALIN1, XTALIN2 GND FUNCTION External Bias Resistor. Connect a 100k 1% resistor in parallel with a 0.1F capacitor in series with a 71k resistor to GND. External Bias Capacitor. Connect a 0.1F capacitor to GND. Supply Voltage. Bypass to GND with a capacitor as close to the pin as possible. Ground. Connect to PC board ground plane. LNA Input. Requires external matching network. IF Output Select. Selects output type. Drive high for single-ended output, drive low for differential output. Internally Connected. Leave unconnected. Digital Control Clock Clock Output Enable 2. Drive high to enable limited-swing clock output. Clock Output Enable 1. Drive high to enable full-swing clock output. AGC External Filter Differential Comparator Outputs Full-Swing Clock Output Digital Output Limited-Swing Clock Output Digital-Control Data Input Shutdown. Drive SHDN high to disable all device functions. Drive SHDN low for normal operation. VCO Tuning Input Charge-Pump Output. Connect directly to loop filter. Connect XTALIN1 and XTALIN2 together and to the TCXO output through a coupling capacitor. Exposed Paddle. Connect to PC board ground plane for optimal performance.
MAX2742
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Single-Chip Global Positioning System Receiver Front-End MAX2742
Detailed Description
LNA/Mixer
The RF input from the GPS antenna is fed through an LNA with a 24dB gain. The amplified signal is then fed to a mixer that downconverts the signal (1575.42MHz) to a quadrature differential IF of 1.023MHz. VCO, TCXO buffer, main frequency divider, phase-frequency detector, and charge pump. It uses an off-chip PLL loop filter and TCXO. Connect the output of the TCXO to XTALIN1 and XTALIN2 through a coupling capacitor. The main division ratio for the synthesizer is 684. With this division ratio, a low-side injection LO can be synthesized with an 18.414MHz TXCO.
IF Stage
The quadrature IF signals pass through the IF filter, which rejects the out-of-band spurs by more than 60dB and the image noise by 18dB (typ). After the image reject filter, the signal is converted from quadrature to differential. The filtered IF signal is then amplified by the AGC block, which sets the VGA output signal level to a predetermined value through the application using 50dB of dynamic range. The internal offset-cancellation mechanism generates a highpass characteristic for the IF section with a 1dB corner frequency of about 100kHz.
Applications Information
Layout Issues
A properly designed PC board is an essential part of any RF/microwave circuit. On all high-frequency inputs and outputs, use controlled impedance lines and keep them as short as possible to minimize losses and radiation. Keeping the traces short also reduces parasitic inductance. To further reduce the parasitic inductance, use wider traces and a solid ground or power plane below the signal traces. Also, place decoupling capacitors as close to the supply pins as possible. For proper power dissipation and operation, connect the metal exposed paddle solidly to the ground plane of the PC board.
IF Output Selection
The sampled outputs of the GPS signal are available in a single-ended or differential format. The IFSEL pin controls the output format.
Synthesizer
An on-chip VCO provides quadrature differential LO signals to the downconverting mixer and controls the frequency. An on-board TCXO generates the reference frequency. The integrated synthesizer includes the
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Single-Chip Global Positioning System Receiver Front-End MAX2742
Typical Application Circuit
TCXO
XTALIN2
XTALIN1
CPOUT
VTUNE
48 RBIAS CBIAS VDD VDD GND GND RFIN GND GND IFSEL 1 2 3 4 5 6 7 8 9 10 LNA
47
46
45
44
43
42
41
40
39
38
SHDN 37 36 I.C.
GND
GND
BIAS
CP
CONTROL BLOCK
GND
VDD
VDD
VDD
I.C.
35 I.C. 34 I.C.
TCXO BUFFER PFD DIV
33 I.C. 32 31 30 29 28 VGA AGC COMP VDD DIN GND CLKOUT2 DOUT
MAX2742
27 I.C. 26 25 CLKOUT1 VDD
I.C. 11 VDD 12 13 GND 14 DCLK 15 CLKENB2 16 CLKENB1 17 VDD 18 AGCFLT 19 OUT-
20 OUT+
21 I.C.
22 I.C.
23 VDD
24 GND
Chip Information
PROCESS: CMOS TRANSISTOR COUNT: 18443
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Single-Chip Global Positioning System Receiver Front-End MAX2742
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
48L,TQFP.EPS
PACKAGE OUTLINE, 32/48L TQFP, 7x7x1.0mm EP OPTION
21-0065
F
1
2
PACKAGE OUTLINE, 32/48L TQFP, 7x7x1.0mm EP OPTION
21-0065
F
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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